FEMPTY=0, ADACT=0, ACFGT=0, FFULL=0, ADTRG=0, REFSEL=00, ACFE=0
Status and Control Register 2
REFSEL | Voltage Reference Selection 0 (00): Default voltage reference pin pair (VREFH/VREFL). 1 (01): Analog supply pin pair (VDDA/VSSA). 3 (11): Reserved - Selects default voltage reference (VREFH/VREFL) pin pair. |
FFULL | Result FIFO full 0 (0): Indicates that ADC result FIFO is not full and next conversion data still can be stored into FIFO. 1 (1): Indicates that ADC result FIFO is full and next conversion will override old data in case of no read action. |
FEMPTY | Result FIFO empty 0 (0): Indicates that ADC result FIFO have at least one valid new data. 1 (1): Indicates that ADC result FIFO have no valid new data. |
ACFGT | Compare Function Greater Than Enable 0 (0): Compare triggers when input is less than compare level. 1 (1): Compare triggers when input is greater than or equal to compare level. |
ACFE | Compare Function Enable 0 (0): Compare function disabled. 1 (1): Compare function enabled. |
ADTRG | Conversion Trigger Select 0 (0): Software trigger selected. 1 (1): Hardware trigger selected. |
ADACT | Conversion Active 0 (0): Conversion not in progress. 1 (1): Conversion in progress. |